发明名称 Electronic device package structures
摘要 A sealing layer is provided on the surface of a substrate such as a semiconductor wafer. The sealing layer includes apertures which expose external contact locations for semiconductor dice formed on the wafer. Solder paste is deposited in the apertures and reflowed to form discrete conductive elements for attachment of the electronic devices to higher level circuit structures. The wafer is then divided or "singulated" to provide individual semiconductor dice having their active surfaces covered by the sealing layer. In this manner, the sealing layer initially acts as a stencil for forming the discrete conductive elements and subsequently forms a chip scale package structure to protect the semiconductor dice from the environment.
申请公布号 US2005253261(A1) 申请公布日期 2005.11.17
申请号 US20050184166 申请日期 2005.07.19
申请人 FARNWORTH WARREN M 发明人 FARNWORTH WARREN M.
分类号 H01L21/60;H01L23/31;H01L23/485;(IPC1-7):H01L23/48 主分类号 H01L21/60
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