发明名称 INTEGRATED CIRCUIT HAVING MULTIDIMENSIONAL SWITCH TOPOLOGY
摘要 <p>Since an FPGA requires an extremely large number of switches in wiring architecture, logical density and operational speed are low and that trend becomes conspicuous in a high integration FPGA. A three-dimensional FPGA is attracting attention because the operational speed and logical density can be improved. However, the yield is low and scaling-down is difficult in the three-dimensional integration process. Furthermore, the number of stacking layers is limited because heat dissipation is difficult. The invention provides an FPGA in which high speed and high integration are attained utilizing the advantages of a three-dimensional FPGA and difficulties in fabrication are eliminated. The problems are solved by providing a designing method of an FPGA being realized by embedding the switch topology of a multidimensional FPGA into an integrated circuit of lower dimension, and a semiconductor integrated circuit comprising an FPGA realized by embedding the switch topology of a multidimensional FPGA into an integrated circuit of lower dimension.</p>
申请公布号 WO2005109646(A1) 申请公布日期 2005.11.17
申请号 WO2005JP05755 申请日期 2005.03.28
申请人 NATIONAL UNIVERSITY CORPORATION OKAYAMA UNIVERSITY;MATSUMOTO, YOHEI;MASAKI, AKIRA 发明人 MATSUMOTO, YOHEI;MASAKI, AKIRA
分类号 H01L21/82;H01L27/118;H03K19/177;(IPC1-7):H03K19/177 主分类号 H01L21/82
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