发明名称 CIRCUIT BOARD AND METHOD OF REDUCING NOISE THEREIN
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a circuit board in which a noise reduction effect is more improved for a packaging component having multiple terminals. <P>SOLUTION: A circuit board constructed by stacking at least two or more layers through an insulating layer is formed with a first ground pattern which is formed on a bottom side of a circuit component; a second ground pattern which is formed separately around the first ground pattern; a third ground pattern which is formed in the layer different from the layers of the first ground pattern and of the second ground pattern; and a via hole for conducting the first ground pattern, the second ground pattern, and the third ground pattern, respectively. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p>
申请公布号 JP2005322861(A) 申请公布日期 2005.11.17
申请号 JP20040141714 申请日期 2004.05.11
申请人 SEIKO EPSON CORP 发明人 NAKAYAMA TERUO;YOKOYAMA YUKITOSHI
分类号 H05K9/00;H01L23/12;H05K1/02;H05K3/46;(IPC1-7):H05K3/46 主分类号 H05K9/00
代理机构 代理人
主权项
地址