发明名称 |
System and method for testing integrated circuits |
摘要 |
A module ( 236, 236 ') containing an integrated testing system ( 108 ) that includes one or more measurement engines ( 200, 202 ) tightly coupled with a compute engine ( 208 ). The one or more measurement engines include at least one stimulus instrument ( 212 ) for exciting circuitry of a device-under-test ( 104 ) with one or more stimulus signals, and at least one measurement instrument ( 216 ) that measures the response of the device-under-test to the stimulus signal(s) and generates measurement data. The compute engine includes computation logic circuitry ( 800 ) for determining whether or not the circuitry aboard the device-under-test passes or fails. The integrated testing system further includes a communications engine ( 204 ) providing two-way communications between the integrated testing system automated testing equipment ( 116 ) and/or a dedicated user interface ( 140 ) residing on a host computer ( 136 ).
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申请公布号 |
US2005253617(A1) |
申请公布日期 |
2005.11.17 |
申请号 |
US20040838846 |
申请日期 |
2004.05.03 |
申请人 |
DFT MICROSYSTEMS CANADA, INC. |
发明人 |
ROBERTS GORDON W.;CHAN ANTONIO H.;DUERDEN GEOFFREY D.;HAFED MOHAMED M.;LABERGE SEBASTIEN;PISHDAD BARDIA;TAM CLARENCE K. |
分类号 |
G01R31/26;G01R31/319;(IPC1-7):G01R31/26 |
主分类号 |
G01R31/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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