| 摘要 |
In one embodiment, a semiconductor substrate ( 38 ) is uniformly polished using a polishing pad ( 16 ) that has a first polishing region ( 26 ), a second polishing region ( 28 ), and a third polishing region ( 30 ). The semiconductor substrate ( 38 ) is aligned to the polishing pad ( 16 ), such that the center of the semiconductor substrate ( 38 ) overlies the second polishing region ( 28 ), and the edge of the semiconductor substrate overlies the first polishing region ( 26 ) and the third polishing region ( 30 ). During polishing, the semiconductor substrate ( 38 ) is not radially oscillated over the surface of the polishing pad, and as a result a more uniform polishing rate is achieved across the semiconductor substrate ( 38 ). This allows the semiconductor substrate ( 38 ) to be uniformly polished from center to edge, and increases die yield because die located on the semiconductor substrate ( 38 ) are not over polished.
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