发明名称 CHIP-PACKAGING WITH BONDING OPTIONS CONNECTED TO A PACKAGE SUBSTRATE
摘要 An integrated circuit package includes a semiconductor chip, bonding pads on the semiconductor chip, a metal lead frame containing electrically with the semiconductor chip, a plurality of wired pins wire-bonded respectively to the bonding pads, and at least one non-wired pin. The non-wired pin is wire-bonded to the metal lead frame to prevent electrostatic discharge failure of the integrated circuit package due to electrostatic discharge stressing of the non-wired pin.
申请公布号 US2005248028(A1) 申请公布日期 2005.11.10
申请号 US20040709428 申请日期 2004.05.05
申请人 HUANG CHENG-YEN 发明人 HUANG CHENG-YEN
分类号 H01L23/495;H01L29/00;(IPC1-7):H01L29/00 主分类号 H01L23/495
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