发明名称 MULTIPLEXING/DEMULTIPLEXING ARCHITECTURE OF FIELD EFFECT TRANSISTOR, AND FORMING METHOD OF THE SAME
摘要 PROBLEM TO BE SOLVED: To enable decoding of an array of a conductive structure where the pitch is narrow. SOLUTION: There is provided a multiplexing/demultiplexing architecture 804 of a field effect transistor (FET) and a method of manufacturing the same. One of the multiplexing/demultiplexing architecture 804 of the FET enables decoding (multiplexing/demultiplexing) of an array 402 or an array 1502 of conductive structure 404 or 1504, where the pitch is narrow. Another architecture enables efficient decoding of the array 402 and 1502 of the conductive structure, where the pitch is narrower or various types of conductive structure in another appearance. Further, the processes of forming the multiplexing/demultiplexing architecture 804 of the FET are disclosed, and in these processes, a processing step which does not depend on positioning is used. In one process among these processes, imprinting step with low accuracy and further processing step which does not depend on positioning are used. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005317968(A) 申请公布日期 2005.11.10
申请号 JP20050128913 申请日期 2005.04.27
申请人 HEWLETT-PACKARD DEVELOPMENT CO LP 发明人 YANG XIOOFENG;KORNILOVICH PAVEL
分类号 H01L21/8234;H01L21/84;H01L27/02;H01L27/088;H01L27/108;H01L27/12;(IPC1-7):H01L21/823 主分类号 H01L21/8234
代理机构 代理人
主权项
地址