发明名称 SEMICONDUCTOR MEMORY APPARATUS
摘要 <p><P>PROBLEM TO BE SOLVED: To realize high speed writing and low power consumption by suppressing variation of injected electric charges quantity for an electric charges accumulating part. <P>SOLUTION: A selector 21 connects a bit line BL selected as a source to a writing stop discriminating circuit 22 at the time of writing of data. When gate voltage Vg and drain voltage Vd are applied, a source current Is is made to flow in the writing stop discriminating circuit 22, an integration circuit 23 opens a switch 27 and integrates it. When a feedback capacitor 26 is charged by the source current Is, an output potential Vout1 of an operational amplifier 25 is lowered gradually from a reference potential Vb. A comparator 24 compares magnitude of the output potential Vout1 with a reference potential Vref any time and discriminates them, and output voltage Vout2 is inputted to the selector 21 and a main control circuit. When the output potential Vout1 becomes the reference potential Vref, the source is separated from the writing stop discriminating circuit 22, and the drain voltage Vd is released and writing is stopped. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p>
申请公布号 JP2005317156(A) 申请公布日期 2005.11.10
申请号 JP20040136170 申请日期 2004.04.30
申请人 INNOTECH CORP 发明人 MITSUIDA TAKASHI
分类号 G11C16/02;G11C16/04;G11C16/06;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C16/02;H01L21/824 主分类号 G11C16/02
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