发明名称 Single-ended transmission for direct access test mode within a differential input and output circuit
摘要 An integrated circuit, such as an integrated circuit memory device, includes an output circuit capable to provide a differential signal on first and second contacts during a first mode of operation, such as in a read or write mode of operation, and a single-ended signal on the first contact during a second mode of operation, such as a test mode of operation. A first variable resistor, responsive to a first control signal, is coupled to a first voltage source and the first contact. A second variable resistor, responsive to a second control signal, is coupled to a second voltage source and the second contact. A first transistor has a first electrode coupled to the first contact, a second electrode coupled to the current source and a gate to receive a first input signal. A second transistor has a first electrode coupled to the second contact, a second electrode coupled to the current source and a gate to receive a second input signal. A differential signal is provided on the first and second contacts responsive to the first and second input signals and first and second control signals. A test circuit included in external test equipment with a predetermined resistor is coupled to the integrated circuit and receives a single-ended signal from the output circuit in a test mode of operation.
申请公布号 US2005251720(A1) 申请公布日期 2005.11.10
申请号 US20040839635 申请日期 2004.05.05
申请人 FANG WAYNE;CHAN ANDY;LEE KUEK-HOCK 发明人 FANG WAYNE;CHAN ANDY;LEE KUEK-HOCK
分类号 G01R31/28;G01R31/317;G06F11/00;G11C29/48;(IPC1-7):G01R31/28 主分类号 G01R31/28
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