| 摘要 |
A test arrangement with a test memory chip and a control device is provided, which has a first and a second interface. The test arrangement is connected to a memory slot of a computer system and is connected by its second interface to a memory module. Error correction data that are written to the error correction chip of the memory module by a memory controller of the computer system are stored in the test memory chip with the aid of the control device. In the case of an error event, it is ascertained whether the error occurred on the error correction chip. If this is the case, the memory controller compares the data stored in the error correction chip with the data of the auxiliary memory. The address of the error correction chip can be deduced from the address of the auxiliary memory, thereby enabling unambiguous addressing of a defective memory cell of the error correction chip.
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