发明名称 |
OPERATION SCHEME WITH CHARGE BALANCING FOR CHARGE TRAPPING NON-VOLATILE MEMORY |
摘要 |
PROBLEM TO BE SOLVED: To provide a memory cell in which programming and erasing can be performed over many times and improved charge retention and reliability are specified. SOLUTION: A memory cell with a charge trapping structure has multiple bias mechanisms. Multiple cycles of applying the bias mechanisms while lowering and raising a threshold voltage of the memory cell leave a distribution of charges in the charge trapping layer. The charge interferes with the threshold voltage achievable in the memory cell. This distribution of charge is balanced by applying a charge balancing bias mechanism at intervals during which a plurality of programs and erase cycles occurs. Also, the charge balancing bias mechanism is applied prior to the beginning of program and erase cycles of the memory cell. COPYRIGHT: (C)2006,JPO&NCIPI
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申请公布号 |
JP2005317191(A) |
申请公布日期 |
2005.11.10 |
申请号 |
JP20050124846 |
申请日期 |
2005.04.22 |
申请人 |
MACRONIX INTERNATL CO LTD |
发明人 |
SHIH YEN-HAO |
分类号 |
G11C16/02;G11C16/04;G11C16/06;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C16/02;H01L21/824 |
主分类号 |
G11C16/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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