发明名称 MICROPROCESSOR
摘要 PROBLEM TO BE SOLVED: To provide a microprocessor for executing a monitor program by external interruption in an external interruption disabled status without using any hardware exclusive for debug such as an ICE, and for debugging the section of a user program to be executed in the external interruption disabled status. SOLUTION: This microprocessor is provided with an interruption conversion circuit 25, and the output of an external interruption control circuit 22 is invalidated, and the output of an interruption conversion circuit 25 is validated in an external interruption disabled status. When an external interrupting signal INT<SB>k</SB>is applied in this status, an input circuit 26<SB>k</SB>does not input an external interruption signal INT<SB>k</SB>when the storage value of a register 27<SB>k</SB>is 0, and inputs the external interruption signal INT<SB>k</SB>when the storage of the register 27<SB>k</SB>s 1, and transmits this to an interruption signal input terminal 15 exclusive for debug of a processor core 10 as an interruption signal exclusive for debug. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005316566(A) 申请公布日期 2005.11.10
申请号 JP20040131121 申请日期 2004.04.27
申请人 FUJITSU LTD 发明人 KAMIGATA TERUHIKO;HAYAKAWA FUMIHIKO
分类号 G06F11/28;G06F9/46;G06F9/48;(IPC1-7):G06F9/46 主分类号 G06F11/28
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