发明名称 DESIGN CORRECTION METHOD, DESIGN PATTERN GENERATING METHOD, AND PROCESS PROXIMITY CORRECTION METHOD
摘要 <P>PROBLEM TO BE SOLVED: To finish the corner of a pattern as a desired pattern, and to improve the pattern accuracy. <P>SOLUTION: The design pattern correction method to apply a correction, to avoid the influence of a minute step-like figure to a design pattern to form a desired planar pattern figure on a wafer includes: extracting edges QP, QR forming the vertex Q of a design pattern 31; measuring the length of the extracted edges QP, QR; deciding whether the length of the edges QP, QR is shorter than a predetermined length; extracting two vertexes P, R connected to the edges QP, QR when the length of the edges QP, QR is decided to be shorter than the predetermined length; and deforming the design pattern, to make the extracted two vertexes P, R coincide with each other. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005316135(A) 申请公布日期 2005.11.10
申请号 JP20040134011 申请日期 2004.04.28
申请人 TOSHIBA CORP;TOSHIBA MICROELECTRONICS CORP 发明人 KOTANI TOSHIYA;NOJIMA SHIGEKI;MAEDA YUKITO
分类号 G03C5/00;G03F1/36;G03F1/68;G03F9/00;G06F17/50;H01L21/027 主分类号 G03C5/00
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