发明名称 |
Methods and apparatus for address map optimization on a multi-scalar extension |
摘要 |
Methods and systems are disclosed for staggered address mapping of memory regions in shared memory for use in multi-threaded processing of single instruction multiple data (SIMD) threads and multi-scalar threads without inter-thread memory region conflicts and permitting transition from SIMD mode to multi-scalar mode without the need for rearrangement of data stored in the memory regions.
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申请公布号 |
US2005251649(A1) |
申请公布日期 |
2005.11.10 |
申请号 |
US20050110492 |
申请日期 |
2005.04.20 |
申请人 |
SONY COMPUTER ENTERTAINMENT INC. |
发明人 |
YAMAZAKI TAKESHI |
分类号 |
G06F9/38;G06F12/06;G06F15/00;G06F15/80;(IPC1-7):G06F15/00 |
主分类号 |
G06F9/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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