发明名称 Bus connection circuit for read operation of multi-port memory device
摘要 There is provided a semiconductor memory design technique, specifically a bus connection circuit for a read operation of a multi-port memory device. The bus connection circuit is adapted to a current sensing type bus transmission/reception structure. The bus connection circuit includes: a read data sensing/latching unit for sensing/latching a read data applied on a local data bus in response to a read data strobe signal; and a read data driving unit for driving the data latched in the read data sensing/latching unit to a global data bus in response to a read data driving pulse, and for connecting or disconnecting a path of current flowing the global data bus according to a logic level of the latched data.
申请公布号 US2005249019(A1) 申请公布日期 2005.11.10
申请号 US20040876504 申请日期 2004.06.24
申请人 SHIN BEOM-JU 发明人 SHIN BEOM-JU
分类号 G11C5/06;G11C7/06;G11C7/10;G11C8/16;G11C11/4091;G11C11/4096;(IPC1-7):G11C5/06 主分类号 G11C5/06
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