发明名称 Flash memory device with improved programming performance
摘要 A selected wordline that is coupled to a cell to be programmed is biased during a program operation. The unselected wordlines are biased with a negative potential to reduce the cell leakage at programming bitline potential. A programming pulse is applied to the bitline coupled to the cell to be programmed. During verification, the unselected wordlines are biased back to ground potential.
申请公布号 US2005248990(A1) 申请公布日期 2005.11.10
申请号 US20040841785 申请日期 2004.05.07
申请人 发明人 KESSENICH JEFFREY A.
分类号 G11C16/10;(IPC1-7):G11C16/04 主分类号 G11C16/10
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