发明名称 DUAL STRAIN-STATE SIGE LAYERS FOR MICROELECTRONICS
摘要 A strained crystalline layer having a tensilely strained SiGe portion and a compressively strained SiGe portion is disclosed. The strained crystalline layer is epitaxially bonded, or grown, on top of a SiGe relaxed buffer layer, in a way that the tensilely strained SiGe has a Ge concentration below that of the SiGe relaxed buffer, and the compressively strained SiGe has a Ge concentration above that of the SiGe relaxed buffer. The strained crystalline layer and the relaxed buffer can reside on top a semi-insulator substrate or on top of an insulating divider layer. In some embodiments the tensile SiGe layer is pure Si, and the compressive SiGe layer is pure Ge. The tensilely strained SiGe layer is suited for hosting electron conduction type devices and the compressively strained SiGe is suited for hosting hole conduction type devices. The strained crystalline layer is capable to seed an epitaxial insulator, or a compound semiconductor layer.
申请公布号 KR20050106432(A) 申请公布日期 2005.11.09
申请号 KR20057015044 申请日期 2005.08.16
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CHU, JACK OON
分类号 H01L21/20;H01L21/762;H01L21/8238;H01L21/84;H01L27/092;H01L29/10;H01L29/778;(IPC1-7):H01L29/78;H01L21/336 主分类号 H01L21/20
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