发明名称 Dual damascene process
摘要 Key to the present invention is the subsequent use of two layers of different positive photoresists, possessing different exposure wavelength sensitivities. It is a general object of the present invention to provide a new and improved method of forming semiconductor integrated circuit devices, and more specifically, in the formation of self-aligned dual damascene interconnects and vias, which incorporates two positive photoresist systems, which have different wavelength sensitivities, to form trench/via openings with only a two-step etching process. In addition, the two layers of photoresist exhibit different etch resistant properties, for subsequent selective reactive ion etching steps. The use of a "high contrast" positive photoresist system has been developed wherein the resist system exposure sensitivity is optimized for wavelengths, deep-UV (248 nm) for the top layer of resist, the trench pattern, and I-line (365 nm) for the bottom layer of resist, the via pattern. The resist system provides a process in dual damascene for trench/via formation and has the following properties: selective etch resistance, thermal stability during processing, ease of processing and developing, and good adhesion properties.
申请公布号 US6962771(B1) 申请公布日期 2005.11.08
申请号 US20000689930 申请日期 2000.10.13
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 LIU CHUNG-SHI;LIN CHIH-CHENG
分类号 G03F7/00;G03F7/095;H01L21/00;H01L21/027;H01L21/311;H01L21/44;H01L21/4763;H01L21/768;(IPC1-7):G03F7/00 主分类号 G03F7/00
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