发明名称 |
Method for testing an integrated semiconductor memory, and integrated semiconductor memory |
摘要 |
An integrated semiconductor memory that can be tested includes a control circuit and a memory cell having a selection transistor. In a normal operating mode, the integrated semiconductor memory can be controlled by applying control signals and can be switched from a normal operating mode to a test operating mode by the applying a signal combination of the control signals. In the test operating mode, the control circuit interprets a first of the control signals as a signal for turning off the selection transistor and a second of the control signals or a signal combination of the control signals as a signal for switching the selection transistor into the on state. The method enables the testing of different times between reading a data set into the memory cell and turning off the selection transistor.
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申请公布号 |
US6963514(B2) |
申请公布日期 |
2005.11.08 |
申请号 |
US20040017857 |
申请日期 |
2004.12.22 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
LINDSTEDT REIDAR;FUHRMANN DIRK |
分类号 |
G11C7/00;G11C29/00;G11C29/34;(IPC1-7):G11C29/00 |
主分类号 |
G11C7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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