发明名称 |
Dynamic optimization of latency and bandwidth on DRAM interfaces |
摘要 |
A method and apparatus is provided which dynamically alters SDRAM memory interface timings to provide minimum read access latencies for different types of memory accesses in a memory subsystem of a computer system. The dynamic alteration of the SDRAM memory interface timings is based on workload and is determined with information from the memory controller read queue.
|
申请公布号 |
US6963516(B2) |
申请公布日期 |
2005.11.08 |
申请号 |
US20020306142 |
申请日期 |
2002.11.27 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
BLACKMON HERMAN LEE;BORKENHAGEN JOHN MICHAEL;KIRSCHT JOSEPH ALLEN;MARCELLA JAMES ANTHONY;SHEDIVY DAVID ALAN |
分类号 |
G06F12/00;G06F13/16;G11C7/10;G11C7/22;G11C11/4076;G11C11/4093;(IPC1-7):G06F13/16 |
主分类号 |
G06F12/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|