发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD THEREFOR
摘要 <P>PROBLEM TO BE SOLVED: To inhibit increase of the contact resistance at an interface between a metal layer and a silicon plug in a wiring structure, in which the silicon plug is formed on the top of the metal layer and connected to the metal layer. <P>SOLUTION: The lower conductive layer (drain) 57 of a vertical MISFET (SV<SB>1</SB>) is connected to an intermediate metal layer 42 via a plug 55 which is formed below the lower conductive layer, and comprises a polycrystalline silicon film. A trap layer 48, comprising a titanium nitride (TiN) film, is formed on part of the surface of the intermediate metal layer 42 to encircle the plug 55. The top layer 48 is formed, in order to prevent an undesired high-resistance oxide layer from being formed on the interface between the plug 55 and the intermediate metal layer 42. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005310852(A) 申请公布日期 2005.11.04
申请号 JP20040122428 申请日期 2004.04.19
申请人 RENESAS TECHNOLOGY CORP 发明人 MORIYA SATOSHI;KIKUCHI TOSHIYUKI;KONNO AKIHIKO;SATO HIDENORI;YAMAMOTO NAOKI;MATSUOKA MASAMICHI;CHAGIHARA HIROSHI;NISHIDA AKIO
分类号 H01L23/522;H01L21/336;H01L21/768;H01L21/8234;H01L21/8244;H01L27/088;H01L27/092;H01L27/11;H01L29/76 主分类号 H01L23/522
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