| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory device the operating speed of which can be improved. <P>SOLUTION: A flash memory 3 includes a plurality of memory cells each including a first MOS transistor MT provided with a floating gate and a control gate, and a second MOS transistor ST provided with a laminated gate comprising laminated first and second gate electrodes 310, 330, and whose drain is connected to the source of the first MOS transistor MT; a memory cell array 10 wherein the memory cells are arranged in a form of a matrix; bit lines electrically interconnecting the drains of the first MOS transistors of the same column in common; word lines electrically interconnecting the control gates of the first MOS transistors of the same row in common; and select gate lines electrically interconnecting the first gate electrodes of the same row in common, and being electrically isolated from the second gate electrodes. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p> |
