| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit of a scan path test system capable of realizing suppression of propagation of an unfixed value into a test object path, while suppressing an increase in a circuit area, and its test method. <P>SOLUTION: When performing a scan path test by forming a scan chain by connecting serially a plurality of flip-flops in a logic circuit, one or the plurality of flip-flops in the logic circuit are provided at the test time as unfixed control flip-flops for holding a value for suppressing propagation of the unfixed value into the test object path and taking-in of the unfixed value by a scan chain on the output side. The unfixed control flip-flops are connected serially based on a control signal to constitute chains 103, 106, 108 other than the scan chains 104, 105, 107, and values to be serially inputted from an input terminal 101 are set respectively on the plurality of unfixed control flip-flops. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
