发明名称 DELAY CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a delay circuit the number of components of which is comparatively small and the circuit area of which can be decreased. <P>SOLUTION: A driver DR comprises a p channel transistor TPD and an n channel transistor TND connected in series between a power supply and ground. Both an input and output of a latch circuit LA comprising series connection of inverters IR1, IR2 are connected to a connecting point between the transistors TPD and TND and connected to an output terminal OUT. A delay time of a timing of a voltage change at the output terminal OUT is decided with respect to ON / OFF of the TRs of the driver DR in response to the capability of the driver DR and the capability of the inverters IR. The circuit area can be decreased by eliminating the need for provision of a capacitor. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005311624(A) 申请公布日期 2005.11.04
申请号 JP20040124708 申请日期 2004.04.20
申请人 SANYO ELECTRIC CO LTD 发明人 IKEDA KYOJI
分类号 H01L51/50;G09G3/20;G09G3/30;H03K5/13;H03K17/693;H03K19/0175;H05B33/14 主分类号 H01L51/50
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