发明名称 LEVEL CONVERSION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a level conversion circuit for appropriately shifting a level. SOLUTION: The level conversion circuit 10 comprises respective MOS transistors PH1, PH2, NH1, NH2, NL1, NL2; and a bias circuit 11, so as to perform level conversion from an input signal IN with a reference voltage GND and a first power source voltage Vdd as a signal level into an output signal OUT with the reference voltage GND and a second power source voltage Vpp being higher than the first power source voltage Vdd as the signal level. The bias circuit 11 supplies bias potential NB, which is higher by the threshold voltages of the NMOS transistors NH1, NH2, to the gates of the respective NMOS transistors NH1, NH2. An electric current flowing in the bias circuit 11 is controlled based on the control signal EN of the power source voltage Vdd. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005311712(A) 申请公布日期 2005.11.04
申请号 JP20040125869 申请日期 2004.04.21
申请人 FUJITSU LTD 发明人 TACHIBANA MASARU;KATO TATSUO
分类号 H03M1/14;H03K3/356;H03K17/10;H03K17/22;H03K19/0185;H03M9/00;(IPC1-7):H03K19/018 主分类号 H03M1/14
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