发明名称 |
Phase-locked loop for communication between integrated circuit systems, has charge pump receiving control signals generated in response to comparison of reference clock signal and feedback signal |
摘要 |
<p>The loop (21) has a charge pump (22) receiving two control signals generated in response to a comparison of phases of a reference clock signal and a feedback signal. An operational amplifier with an input that receives a signal of the charge pump, and other two inputs receive the two control signals, respectively. A voltage controlled oscillator receives a control voltage signal and generates a feedback clock signal. Independent claims are also included for the following: (A) a memory system comprising a memory controller and memory modules with memory device (B) a method for receiving charge pump control signals.</p> |
申请公布号 |
DE102005017686(A1) |
申请公布日期 |
2005.11.03 |
申请号 |
DE20051017686 |
申请日期 |
2005.04.08 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
SOHN, YOUNG-SOO |
分类号 |
H03L7/107;G11C5/14;G11C7/22;G11C11/4193;H03L7/089;H03L7/093;H03L7/10;(IPC1-7):H03L7/10;G11C11/419 |
主分类号 |
H03L7/107 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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