发明名称 BARRIER FOR INTERCONNECT AND METHOD
摘要 A method of creating a multi-layered barrier for use in an interconnect, a barrier for an interconnect, and an interconnect including the barrier are disclosed. The method includes creating the multi-layered barrier in a recess of the device terminal by use of a single electroplating chemistry to enhance protection against voiding and de-lamination due to the diffusion of copper, whether by self-diffusion or electro-migration. The barrier includes at least a first layer of nickel-rich material and a second layer of copper-rich material. The barrier enables use of higher current densities for advanced complementary metal-oxide semiconductors (CMOS) designs, and extends the reliability of current CMOS designs regardless of solder selection. Moreover, this technology is easily adapted to current methods of fabricating electroplated interconnects such as C4s.
申请公布号 US2005245070(A1) 申请公布日期 2005.11.03
申请号 US20040709321 申请日期 2004.04.28
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 ANDRICACOS PANAYOTIS C.;CHENG TIEN-JEN;COOPER EMANUEL I.;EICHSTADT DAVID E.;GRIFFITH JONATHAN H.;KNARR RANDOLPH F.;QUON ROGER A.;ROGGEMAN ERIK J.
分类号 H01L21/288;H01L21/4763;H01L21/60;H01L23/485;(IPC1-7):H01L21/476 主分类号 H01L21/288
代理机构 代理人
主权项
地址
您可能感兴趣的专利