发明名称 Process for providing submodel performance in a computer processing unit
摘要 A simple and accurate processor derating method includes: sampling a real-time counter/clock too obtain an initial time value T 1 ; resetting an Icnt Counter; incrementing the Icnt Counter to reflect the processing of each instruction; comparing the count in the Icnt Counter to a predetermined count IcntMax and if the count in the Icnt Counter is at least IcntMax, then sampling the RTC to obtain a second time T 2 . T 1 is then subtracted from T 2 to obtain a time difference DT which is multiplied by ((1-1/DF)-1) to obtain a Degradation Delay DD period, DF being a constant having a value which is the desired submodel performance with respect to full performance. The Degradation Delay is instituted, the RTC is sampled from time to time to obtain a test third time T 3 . When a test T 3 minus T 2 is not less than DD, then T 1 is set to T 3 . Then, the procedure is repeated for a next group of instructions. Optionally, further accuracy can be achieved by treating "wait-type" and/or "RTC-access-type" instructions specially and also by calculating a DDExtra period value which is used to adjust the next DD.
申请公布号 US2005246566(A1) 申请公布日期 2005.11.03
申请号 US20040837079 申请日期 2004.04.30
申请人 BULL HN INFORMATION SYSTEMS INC. 发明人 BOULT STEFAN R.
分类号 A01K67/027;A61K38/00;A61K48/00;C07K14/755;C12N15/85;C12N15/861;G06F1/04;G06F1/14;(IPC1-7):G06F1/04 主分类号 A01K67/027
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