| 摘要 |
A pixel clock generation circuit is disclosed, including a high frequency clock generation unit configured to generate high frequency clock, a clock modulation data generation unit configured to generate clock modulation data based on pixel clock phase data indicating timing of a transition in pixel clock. The pixel clock generation circuit further includes a modulation clock generation unit configured to modulate the frequency and phase of the high frequency clock based on the modulation data thereby to generate modulated pixel clock.
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