Technique for reducing the roughness of metal lines in a metallization layer

摘要

A simplified dielectric layer stack for the first metallization layer is provided in combination with an improved anisotropic etch process, wherein the etch attack at the trench perimeter is reduced for a patterning process on the basis of a 193 nm lithography. In the simplified layer stack, a bottom low-k dielectric layer may be omitted, thereby reducing production costs while enhancing product performance by lowering leakage currents in the first metallization layer.