发明名称 Buffer device for a clock enable signal used in a memory device
摘要 Disclosed is a buffer device for a clock enable signal in a memory device that is used when the memory device escapes from a self-refresh mode. The buffer device includes a first buffer for comparing a clock enable signal with an external reference voltage in accordance with a self-refresh flag signal, a second buffer for outputting a signal corresponding to the self-refresh flag signal as the clock enable signal, a comparator for comparing the external reference voltage applied from an outside with an internal reference voltage internally generated, and a switching unit for selecting and outputting an output of the first buffer if the external reference voltage is higher than the internal reference voltage and selecting and outputting an output of the second buffer if the external reference voltage is lower than the internal reference voltage in accordance with an output signal of the comparator.
申请公布号 US2005243615(A1) 申请公布日期 2005.11.03
申请号 US20040963102 申请日期 2004.10.12
申请人 CHO JOO H 发明人 CHO JOO H.
分类号 G11C11/4076;G11C5/00;G11C7/22;(IPC1-7):G11C5/00 主分类号 G11C11/4076
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