发明名称 |
Method of reducing erosion of a nitride gate cap layer during reactive ion etch of nitride liner layer for bit line contact of DRAM device |
摘要 |
An etch rate of a nitride liner layer is improved relative to an etch rate of a nitride cap layer. The nitride liner layer is located at an exposed portion of a substrate adjacent to a stacked structure also located atop the substrate. The nitride cap layer is located atop the stacked structure. An oxide spacer is formed along sidewalls of the stacked structure. The nitride liner layer is patterned and etched to form at least one opening therein to the substrate while the nitride cap layer remains substantially intact.
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申请公布号 |
US6960523(B2) |
申请公布日期 |
2005.11.01 |
申请号 |
US20030406645 |
申请日期 |
2003.04.03 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
MALDEI MICHAEL;DEV PRAKASH C.;DOBUZINSKY DAVID;FALTERMEIER JOHNATHAN;RUPP THOMAS S.;YU CHIENFAN;RENGARAJAN RAJESH;BENEDICT JOHN;NAEEM MUNIR-UD-DIN |
分类号 |
H01L21/311;H01L21/60;H01L21/8242;H01L23/485;(IPC1-7):H01L21/476;H01L21/320 |
主分类号 |
H01L21/311 |
代理机构 |
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代理人 |
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地址 |
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