Dual-counterdoped channel field effect transistor and method

摘要

A field effect transistor with a dual-counterdoped channel is disclosed. The transistor features a channel comprising a first doped region ( 28 ) and a second doped region ( 26 ) underlying the first doped region. A source and drain ( 32 ) are formed adjacent to the channel. In one embodiment of the present invention, the first doped region ( 28 ) is doped with arsenic, while the second doped region ( 26 ) is doped with phosphorus. The high charge-carrier mobility of the subsurface channel layer ( 28 ) allowing a lower channel dopant concentration to be used, which in turn allows lower source/drain pocket doping. This reduces the capacitance and response time of the transistor.