| 摘要 |
PROBLEM TO BE SOLVED: To provide a nonvolatile NAND circuit in which a power consumption can be reduced by reducing the area . SOLUTION: The drain and source of an n type channel ferroelectric lamination gate transistor 501 are connected to the source of an n type channel ferroelectric lamination gate transistor 502 and the drains of two p type channel ferroelectric lamination gate transistors 503 and 504, respectively. An input signal 507 is inputted to the n type channel ferroelectric lamination gate transistor 501, the p type channel ferroelectric lamination gate transistor 503 and an inverter 505, and an input signal 508 is inputted to the n type channel ferroelectric lamination gate transistor 502, the p type channel ferroelectric lamination gate transistor 504 and an inverter 506, and 509 is outputted. COPYRIGHT: (C)2006,JPO&NCIPI
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