| 摘要 |
PROBLEM TO BE SOLVED: To provide a data communication device capable of improving operation performance of central arithmetic circuits by increasing operation speed of the central arithmetic circuits while securing accurate reading or writing of data when requiring access at a plurality of access cycles different from each other. SOLUTION: This data communication device has: devices 2-4 set with a plurality of memory areas; and the central arithmetic circuits 5, 6 for performing data communication with the devices. The central arithmetic circuits 5, 6 each have a storage means storing memory area information related to the plurality of memory areas of the device, and access information related to the prescribed access cycles set to values different from each other corresponding to the plurality of memory areas, and each respectively access the pluraity of memory areas at the prescribed access cycles on the basis of the memory area information and the access cycle information when performing the data communication with the device. COPYRIGHT: (C)2006,JPO&NCIPI
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