发明名称 |
Core-level processor lockstepping |
摘要 |
A device is provided which includes a first microprocessor core to generate a first output signal; a second microprocessor core to generate a second output signal; a switching fabric having a first input/output port; and lockstep logic, coupled between the first input/output port of the switching fabric and the first and second microprocessor cores, to detect whether the first output signal differs from the second output signal.
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申请公布号 |
US2005240811(A1) |
申请公布日期 |
2005.10.27 |
申请号 |
US20040818975 |
申请日期 |
2004.04.06 |
申请人 |
SAFFORD KEVIN D;LYLES CHRISTOPHER L;DELANO ERIC R |
发明人 |
SAFFORD KEVIN D.;LYLES CHRISTOPHER L.;DELANO ERIC R. |
分类号 |
G06F11/18;G06F11/00;G06F11/16;G06F11/20;(IPC1-7):G06F11/00 |
主分类号 |
G06F11/18 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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