发明名称 Generating test patterns having enhanced coverage of untargeted defects
摘要 Disclosed below are representative embodiments of methods, apparatus, and systems for generating test patterns having an increased ability to detect untargeted defects. In one exemplary embodiment, for instance, one or more deterministic test values for testing targeted faults (e.g., stuck-at faults or bridging faults) in an integrated circuit design are determined. Additional test values that increase detectability of one or more untargeted defects during testing are determined. One or more test patterns are created that include at least a portion of the deterministic test values and at least a portion of the additional test values. Computer-readable media comprising computer-executable instructions for causing a computer to perform any of the disclosed methods or comprising test patterns generated by any of the disclosed embodiments are also disclosed.
申请公布号 US2005240887(A1) 申请公布日期 2005.10.27
申请号 US20040979496 申请日期 2004.11.01
申请人 RAJSKI JANUSZ;TANG HUAXING;WANG CHEN 发明人 RAJSKI JANUSZ;TANG HUAXING;WANG CHEN
分类号 G01R31/3183;G06F7/60;G06F11/00;G06F17/50;(IPC1-7):G06F17/50 主分类号 G01R31/3183
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