发明名称 Failure detection circuit
摘要 A failure detection circuit that can detect the performance degradation of a FeRAM caused by thermal stress regardless of whether power is being supplied or not, and prevent the use of a deteriorated FeRAM. It comprises a detector FeRAM cell structured identically to a memory cell actually employed and used for detecting the performance degradation of the FeRAM, a filtering voltage generator circuit, which generates a filtering voltage used for determining the performance degradation, an expected value output circuit, which outputs an expected value equal to the data already stored in the detector FeRAM cell, a sense amplifier, which reproduces data stored in the detector FeRAM cell using the filtering voltage, and a comparator, which outputs an failure detection signal indicating the performance degradation of the FeRAM when the expected value and the data reproduced by the sense amplifier don't match.
申请公布号 US2005237782(A1) 申请公布日期 2005.10.27
申请号 US20050109699 申请日期 2005.04.20
申请人 NEC ELECTRONICS CORPORATION 发明人 SHIRAISHI HIDETOSHI
分类号 G11C11/22;(IPC1-7):G11C11/22 主分类号 G11C11/22
代理机构 代理人
主权项
地址
您可能感兴趣的专利