发明名称 Process and apparatus for placing cells in an IC floorplan
摘要 Cells are placed into an integrated circuit floorplan by creating clusters of cells in modules, each cluster being composed of cells in a path connected to at least one flip-flop in the module, or of cells that are not in a path connected to any flip-flop. Regions are defined in the floorplan for placement of modules, and the clusters are placed into optimal locations in modules and placing the modules into optimal locations in the regions. T coordinates for the wires, modules and clusters are selectively recalculated. The clusters are moved in the floorplan for more uniform density, and the modules are assigned to regions based on module coordinates.
申请公布号 US2005240889(A1) 申请公布日期 2005.10.27
申请号 US20040830542 申请日期 2004.04.23
申请人 LSI LOGIC CORPORATION 发明人 ANDREEV ALEXANDER E.;NIKITIN ANDREY A.;VIKHLIANTSEV IGOR A.
分类号 G06F9/45;G06F17/50;(IPC1-7):G06F9/45 主分类号 G06F9/45
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