发明名称 MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a manufacturing method for a semiconductor device providing excellent flatness after an insulating film buried between gate wirings is polished by a CMP method by using an optimum mask pattern. SOLUTION: The manufacturing method for the semiconductor device has a process in which buried material layers 4 are formed on a semiconductor substrate, and a plurality of regions 1a, 1b and 1c having different wiring densities are formed in the unit device of one chip so as to bury trenches among wirings 2a, 2b and 2c formed in the plurality of regions, and a process in which specified mask patterns 6a, 6b and 6c are formed on surfaces of the buried material layers. The manufacturing method for the semiconductor device further has a process in which the buried material layers exposed in the openings of the mask patterns are removed by dry etching by specified depths d1 and d2, respectively, and a process in which the mask patterns are removed and the buried material layers are polished. A plurality of adjusting regions are set by specified references corresponding to wiring densities, and a mean volume per the unit area of the buried material layers remaining in a plurality of the adjusting regions after the process of the dry etching is set at a fixed value without depending upon the adjusting regions. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005302894(A) 申请公布日期 2005.10.27
申请号 JP20040114542 申请日期 2004.04.08
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SUNADA TAKESHI;IKENOUCHI KATSUYUKI
分类号 H01L21/768;H01L23/522;(IPC1-7):H01L21/768 主分类号 H01L21/768
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