发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND DESIGNING METHOD THEREFOR
摘要 PROBLEM TO BE SOLVED: To provide a method of designing semiconductor integrated circuit devices which can reduce skew produced by signal lines, and also to provide a semiconductor integrated circuit device with reduced skew. SOLUTION: In this method of designing, layout of a semiconductor integrated circuit is performed by arranging functional blocks on a chip and determining a wiring path. The method of designing comprises steps of: dividing an area on the chip into functional block arrangement regions 2 wherein the functional blocks are to be arranged and wiring regions 1 wherein the signal lines for connecting between the functional block arrangement regions 2 are to be arranged, by initially arranging the wiring regions on the chip; determining how many signal lines are to be arranged in the wiring regions 1; determining the signal characteristics of the signal lines to be arranged in the wiring regions 1; rearranging the wiring regions 1 based on the number of signal lines and the signal line characteristics; and determining wiring 8 between the functional blocks by arranging the functional blocks in the functional block arrangement regions 2 separated by the wiring regions 1. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005302756(A) 申请公布日期 2005.10.27
申请号 JP20040111925 申请日期 2004.04.06
申请人 NEC ELECTRONICS CORP 发明人 FUKUSHIMA TOSHINAO
分类号 G06F17/50;H01L21/82;H01L27/118;(IPC1-7):H01L27/118 主分类号 G06F17/50
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