| 摘要 |
A musical performance apparatus has an I/O unit including a digital signal processor (DSP) and a plurality of application-specific integrated circuits (ASIC), which are connected together in a cascade connection manner and each of which includes a plurality of shift registers. The DSP produces drive signals for driving a plurality of operators (e.g., keys and pedals) based on performance data. In synchronization with a serial clock signal, drive signals are transferred in a serial manner from the DSP to the shift registers. In synchronization with a word sync signal based on the serial clock signal, detection signals representing displacements of the operators are transferred in parallel to the shift registers, which in turn output drive signals in parallel. Both of the serial clock signal and word sync signal are produced using a single clock generator.
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