| 摘要 |
Current consumption in a start signal outputting circuit, and that in a clock signal conductor thereto, or the EMI is to be suppressed. An output C 1 from the 126th stage flipflop 31 - 126 of a shift register 30, having 128 stages of flipflops 31, is supplied to a start signal outputting circuit 40. An output of the start signal outputting circuit 40 is delivered as a start signal OSTH, while being delivered to a start signal output detection circuit 40. A detection signal STD from a start signal output detection circuit 50 and an output C 124 of the 124th stage flipflop 31 - 124 of the shift register 30 are supplied to a clock stop circuit 60. Clock signals CLKA cease to be supplied by the clock stop circuit 60 during a time period as from inputting of the detection signal STD until inputting of C 124.
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