| 摘要 |
PROBLEM TO BE SOLVED: To provide a static random access memory which can stabilize the data memory in SRAM cells and improves an operation speed by increasing the cell currents. SOLUTION: At a transfer gate TR1, the gate is connected to the word line WL, an end of a 1st current path is connected to a bit line BL, and its another end is connected to the output of an inverter IV1 and to the input of an inverter IV2. At a transfer gate TR2, the gate is connected to the word line WL, an end of a 2nd current path is connected to the bit line/BL, and its another end is connected to the output of the inverter IV2 and to the input of the inverter IV1. At a transfer gate TR3, the gate is connected to the word line WL, and an end of a 3rd current path is connected to the bit line BL. At a read driver, the gate is connected to the input of the inverter IV1 and to the output of the inverter IV2, an end of a 4th current path is connected to another end of the 3rd current path, and its another end is supplied with the ground potential. COPYRIGHT: (C)2006,JPO&NCIPI |
