| 摘要 |
PROBLEM TO BE SOLVED: To provide necessary power supply wiring and signal wiring while ensuring a space enough for arranging internal cells without increasing an area for chips. SOLUTION: An I/O cell 10 arranged around a chip includes an external connection terminal 12, a protection element 14, and signal wiring elements 18a-18g, 20a and 20b and power supply wiring elements 16a and 16b having a multilayer wiring structure. A power supply wiring for supplying power supply to the internal cell is formed by using a wiring layer in the uppermost layer, and the wiring layers 16a and 16b may be formed overlapping the internal cell area. A via hole is made in the overlapping portion to make contact with the power supply wiring in the lower layer, thereby forming a power supply route to the internal cell. COPYRIGHT: (C)2006,JPO&NCIPI
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