发明名称 METHOD FOR PRODUCING BIT LINES FOR UCP FLASH MEMORIES
摘要 A semiconductor device can be fabricated by forming a floating gate layer over a semiconductor body. The floating gate layer is at least partially arranged over an insulation region in the semiconductor body. The floating gate layer is patterned to expose a portion of the insulation region. A recess is formed in a portion of the insulation region exposed by the patterned floating gate layer. A conductor is deposited within the recess. The conductor serves as a buried bitline. An insulator can then be formed within the recess over the conductor.
申请公布号 EP1588417(A2) 申请公布日期 2005.10.26
申请号 EP20040702285 申请日期 2004.01.15
申请人 INFINEON TECHNOLOGIES AG;GRATZ, ACHIM 发明人 GRATZ, ACHIM;POLEI, VERONIKA;ROEHRICH, MARK
分类号 H01L27/115;H01L21/336;H01L21/8247;H01L29/788 主分类号 H01L27/115
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