摘要 |
A receiver has an adder for output intermediate-frequency signals of a plurality of receiving blocks, a demodulator for an added intermediate-frequency signal, adjustable reference-signal generator for supplying phase-shifted reference signals to the PLL circuits of the plurality of receiving blocks, and a plurality of switches. The switches are controlled when power is first supplied to the receiver such that the frequency-divided reference signals to the PLL circuits are in phase with one another. The adjustable reference-signal generator, upon tuning on power, is set in the phase-shift adjusted state stored immediately before previously turning off the power.
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