发明名称 Jitter reducing apparatus using digital modulation technique
摘要 A jitter reducing apparatus using a digital modulation technique includes: an elastic store storing data flowed in from an SDH network; a pattern generator controlling a data read speed so the elastic store maintains a constant data storing amount; a modulation sequencer generating a digital signal wave having a constant period and amplitude; and a phase level detector controlling the pattern generator using the digital signal wave of the modulation sequencer.
申请公布号 US6959060(B2) 申请公布日期 2005.10.25
申请号 US20010942638 申请日期 2001.08.31
申请人 LG ELECTRONICS INC. 发明人 JUNG WOON JIN
分类号 H04J3/07;H04L1/20;H04L25/05;(IPC1-7):H04L25/36;H04L7/00;H04L25/40 主分类号 H04J3/07
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