发明名称 Data input apparatus of DDR SDRAM and method thereof
摘要 Provided is directed to a data input apparatus and a method of DDR SDRAM which can improve reliability of a circuit operation by transferring data inputted after applying a data strobe signal DQS to an input/output bus GIO by a exact timing, by means of correctly arranging the data strobe signal DQS and a data input strobe pulse dinstbp regardless of time difference of inputting the data strobe signal DQS after a write command, in response to generating a data input strobe pulse dinstbp used to load data to the input/output bus GIO as a data strobe pulse dsp identical to the data strobe signal DQS.
申请公布号 US2005232033(A1) 申请公布日期 2005.10.20
申请号 US20040878179 申请日期 2004.06.28
申请人 HYNIX SEMICONDUCTOR INC. 发明人 CHA JAE H.
分类号 G11C11/409;G11C7/00;G11C7/10;G11C11/40;G11C11/407;(IPC1-7):G11C7/00 主分类号 G11C11/409
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