发明名称 HOW TO MEASURE DUTY CYCLE
摘要 PROBLEM TO BE SOLVED: To provide a method which enables measurement of duty cycle in signal, without requiring dedicated analog instruments. SOLUTION: This measuring method is sufficiently speedy, to allow measurement of duty cycle in a semiconductor component during manufacture. This method also can be provided at low cost, by using an automatic test equipment. A comparator of digital channels is used to read the input signal status at plural points throughout the signal cycle. A failure processing circuit in the testing unit is used to count the number of samples, wherein input signal is in a logic HI state. This value is scaled by the total number of samples collected for providing one number which indicates the duty cycle of the signal. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005292135(A) 申请公布日期 2005.10.20
申请号 JP20050086530 申请日期 2005.03.24
申请人 TERADYNE INC 发明人 BELLEAU RAOUL J
分类号 G01R29/02;G01R29/027;G01R31/28;(IPC1-7):G01R29/02 主分类号 G01R29/02
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